3T reduces test time from days to minutes
Nowadays, many machines consist of a complex combination of electronics, software, mechanics, actuators and sensors. Testing of such a system is therefore a difficult job. How do you test for example, the coincidence of several independent events and verify that the machine responds on time and correctly? 3T has developed a classification system tailored for the testing of all safety and control algorithms in a very precise mechatronic machine.
At 3T we develop solutions for customer-specific systems. Here we use our in-house expertise in the design of analog and digital electronics and our experience in the field of FPGAs, embedded software and Labview. One of our customers asked us to develop a qualification test environment. This was to verify the complete embedded system of a complex mechatronic machine. Such costly devices demand a very precise control system. To avoid damage, electronic systems are integrated to ensure that the movements are within the safety margins.
The customer’s control electronics consists of several modules, in which several FPGAs and microprocessors have been implemented. Each time a change is made in the FPGA code or software on this control modules, the module must be re-tested and qualified. It often happens that after the final tests are carried out, there are still minor changes to the design or that FPGA code needs to be extended. All the changes requires that the system must be re-qualified.
In the past, engineers had to do all qualification tests by hand in order to ensure safe operation of the system. They did this by offering signals to the system and to measure the response. Such qualification tests could take more than a week because a lot of inputs and outputs, test scenarios and combinations of conditions must be verified. This is the reason that 3T developed an automatic classification system. It is a tool that is able to test the modules in combination with the other embedded systems that are part of the machine.
The new qualification test environment consists of a test rack to communicate with the modules of the client and a PC-based analyzer, using Labview. The rack can have up to ten modules and has a purpose-built active PCB backplane with ten layers. It is connected to two PCI-7813R FPGA modules from National Instruments which are installed in an industrial PC via eight 68-pin connectors.
By means of two-FPGA modules, we have 320 digital I/O lines that are almost all in use. In order to be able to feed and measure all the signals of the modules-under-test, the PCB in the backplane must be able to generate more than four hundred analog signals, and be able to read more than one hundred analog signals. In addition, the system has to manage more than two hundred serial communication channels and generate many signals to simulate all axes and motors. Because the FPGA modules do not have such an amount of analog and digital I/O, the backplane contains a number of DACs and daisy-chained parallel-to-serial converters to combine up to hundreds of digital lines.
The front of the test rack contains the slots to insert different cards and connecting them in parallel with the test PC via the optical couplers.
At the rear side, there is the two-layer backplane and the eight blue connectors to which the NI-FPGAs can be connected.
All of the digital lines are controlled and acquired by making use of a clock and a digital line. This serial bus is driven at a frequency of more than one hundred times the update frequency which is needed for the module-under-test (up to 20 kHz update rate for all I/O). The PCI-7813R modules acquire serial data, convert it back into simple Boolean strings and make the information thus available for further processing in the software application.
Another advantage of the FPGA is the generation of simulated encoders. We have developed a set of simulation functions in Labview that can generate proper encoder signals but also various error conditions, such as an incorrect phase offset between the coder pulses. These signals are generated at high speed (MHz range). The determinism of the FPGA makes it of essential importance.
The complete testing and qualification of the modules-under-test means that we have to check as if they were housed in the real machine. The rear side of the modules has connectors with which they communicate with motors, sensors and other actuators. At the front side of the modules, there are optical connections, in order to control them, via a high-speed fiber optical connection, from the central computer system. In our qualification test computer, we use PCI cards that enable us to communicate with the same fiber interface from the Labview software. We can send commands as if they were sent from the machine computer itself, and then keep an eye on how the modules respond to the simulated sensors and actuators.
We have developed the complete qualification testing software in Labview. It consists of two main parts: the hardware I/O server and the control center. The hardware I/O server is a low-level driver that uses the FPGA-modules and the fiber-optic connections communicate to the modules-under-test. The server provides the access to the analog signals, the encoder positions, and the digital lines. Mapping of the hardware I/O to the indicators/controllers in the software is stored in a separate text-based configuration file. The software runs best on a dual or multicore computer to ensure that real-time monitoring and control of all data is possible. While the application starts, it detects the I/O server running on a multicore machine, and claims one processor for this task.
The control center is running at a second core and allows for the coupling to the hardware I /O server via a TCP /IP connection. This makes it also possible to run it on a different computer. It is used to initiate the tests, and provides the user with the information about the status of the modules. For example, it can show the status of the backplane from the control center, including all analog voltages, digital data and the positions of simulated encoders.
In addition, the control center includes a register map to make fiber communication visible. The data can be displayed in real time or be represented by an interval time of 10 mS in graphs using indicators. This can be done a variety of formats such as floating-point numbers, integers, hexadecimal or binary. Furthermore, it can be tested whether the values are within the limits that have been set.
The control center contains the most important part: a script window to automate the testing. The user who has application-specific knowledge, can control the modules completely. The scripts use standard commands such as writing to registers, wait commands, reading registers, initiate an update via the optical link and verify the values with respect to the limits. In the meanwhile, our customer has already developed a number of scripts, some of which contain even more than two thousand steps, which also form part of the qualification report..
Test time reduction
In the past, the execution of all tests took more than days to complete. Moreover, a number of test had to be done on the actual machine in order to communicate back and forth between the different modules. The customer is now able to run all of the standard test scripts in a simple manner and to carry out a full qualification within half an hour. And that without using valuable machine time. We can now test the modules while the machine is still being manufactured, so before the modules are placed in the machine. The result is that fewer problems arise during the assembly of the complex machine.
Practice shows that the new qualification system is very valuable. It saves time and costs. In addition, it improves system reliability. We have multiple systems tested in practice. By means of the flexible-Labview architecture we can add new properties and characteristics to the application seamlessly.
Aschwin van de Haar, Consulting Engineer at 3T in Enschede.
Source: Bits&Chips, 16 december 2010